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december 2015 docid027747 rev 2 1 / 14 this is information on a product in full production. www.st.com STP10LN80K5 n - channel 800 v, 0.55 typ., 8 a mdmesh? k5 power mosfet in a to - 220 package datasheet - production data figure 1 : internal schematic diagram features order code v ds r ds(on) max. i d STP10LN80K5 800 v 0.63 8 a ? industrys lowest r ds(on) x area ? industrys best figure of merit (fom) ? ultra - low gate charge ? 100% avalanche tested ? zener - protected applications ? switching applications description this very high voltage n - channel power mosfet is designed using mdmesh? k5 technology based on an innovative proprietary vertical structure. the result is a dramatic r eduction in on - resistance and ultra - low gate charge for applications requiring superior power density and high efficiency. table 1: device summary order code marking packa ge packing STP10LN80K5 10ln80k5 to - 220 tube
contents STP10LN80K5 2 / 14 docid027747 rev 2 contents 1 electrical ratings ................................ ................................ ............. 3 2 electrical characteristics ................................ ................................ 4 2.1 electrical characteri stics (curves) ................................ ...................... 6 3 test circuits ................................ ................................ ..................... 9 4 package information ................................ ................................ ..... 10 4.1 to - 220 type a package information ................................ ................ 11 5 revision hist ory ................................ ................................ ............ 13
STP10LN80K5 electrical ratings docid027747 rev 2 3 / 14 1 electrical ratings table 2: absolute maximum ratings symbol parameter value unit v gs gate - source voltage 30 v i d drain current (continuous) at t c = 25 c 8 a i d drain current (continuous) at t c = 100 c 5 a i dm (1) drain current (pulsed) 32 a p tot total dissipation at t c = 25 c 110 w dv/dt (2) peak diode recovery voltage slope 4.5 v/ns dv/dt (3) mosfet dv/dt ruggedness 50 t j operating junction temperature - 55 to 150 c t stg storage temperature notes: (1) pulse width limited by safe operating area (2) i sd 8 a, di/dt 100 a/s; v ds peak < v (br)dss , v dd = 640 v (3) v ds 640 v table 3: thermal data symbol parameter value unit r thj - case thermal resistance junction - case 1.14 c/w r thj - amb thermal resistance junction - ambient 62.5 c/w table 4: avalanche characteristics symbol parameter value unit i ar avalanche current, repetitive or not repetitive (pulse width limited by t jmax ) 2.7 a e a s single pulse avalanche energy (starting t j = 25 c, i d = i ar , v dd = 50 v) 240 mj
electrical characteristics STP10LN80K5 4 / 14 docid027747 rev 2 2 electrical characteristics t c = 25 c unless otherwise specified table 5: on/off - state symbol parameter test conditions min. typ. max. unit v (br)dss drain - source breakdown voltage v gs = 0 v, i d = 1 ma 800 v i dss zero gate voltage drain current v gs = 0 v, v ds = 800 v 1 a v gs = 0 v, v ds = 800 v t c = 125 c 50 a i gss gate body leakage current v ds = 0 v, v gs = 20 v 10 a v gs(th) gate threshold voltage v dd = v gs , i d = 100 a 3 4 5 v r ds(on) static drain - source on - resistance v gs = 10 v, i d = 4 a 0.55 0.63 ? table 6: dynamic symbol parameter test conditions min. typ. max. unit c iss input capacitance v ds = 100 v, f = 1 mhz, v gs = 0 v - 427 - pf c oss output capacitance - 43 - pf c rss reverse transfer capacitance - 0.25 - pf c o(tr) (1) equivalent capacitance time related v ds = 0 to 640 v, v gs = 0 v - 72 - pf c o(er) (2) equivalent capacitance energy related 27 - pf r g intrinsic gate resistance f = 1 mhz , i d = 0 a - 7 - ? q g total gate charge v dd = 640 v, i d = 8 a v gs = 10 v see figure 16: "test circuit for gate charge behavior" - 15 - nc q gs gate - source charge - 4.2 - nc q gd gate - drain charge - 9 - nc notes: (1) time related is defined as a constant equivalent capacitance giving the same charging time as coss when v ds increases from 0 to 80% v dss (2) energy related is defined as a constant equivalent capacitance giving the same stored energy as coss when v ds increases from 0 to 80% v dss table 7: switching times symbol parameter test conditions min. typ. max. unit t d(on) turn - on delay time v dd = 400 v, i d = 4 a, r g = 4.7 ? v gs = 10 v see figure 15: "test circuit for resistive load switching times" and figure 20: "switching time waveform" - 11.8 - ns t r rise time - 10 - ns t d(off) turn - off delay time - 28 - ns t f fall time - 13 - ns
STP10LN80K5 electrical characteristics docid027747 rev 2 5 / 14 table 8: source - drain diode symbol parameter test conditions min. typ. max. unit i sd source - drain current - 8 a i sdm (1) source - drain current (pulsed) - 32 a v sd (2) forward on voltage i sd = 8 a, v gs = 0 v - 1.5 v t rr reverse recovery time i sd = 8 a, di/dt = 100 a/s,v dd = 60 v see figure 17: "test circuit for inductive load switching and diode recovery times" - 350 ns q rr reverse recovery charge - 3.9 c i rrm reverse recovery current - 22.5 a t rr reverse recovery time i sd = 8 a, di/dt = 100 a/s v dd = 60 v, t j = 150 c see figure 17: "test circuit for inductive load switching and diode recovery times" - 505 ns q rr reverse recovery charge - 5 c i rrm reverse recovery current - 20 a notes: (1) pulse width limited by safe operating area (2) pulsed: pulse duration = 300 s, duty cycle 1.5% table 9: gate - source zener diode symbol parameter test conditions min. typ. max. unit v (br)gso gate - source breakdown voltage i gs = 1ma,i d = 0 a 30 - - v the built - in back - to - back zener diodes are specifically designed to enhance the esd performance of the device. the zener voltage facilitates efficient and cost - effective device integrity protection,thus eliminating the need for additional external componentry.
electrical characteristics STP10LN80K5 6 / 14 docid027747 rev 2 2.2 electrical characteristics (curves) figure 2 : safe operating area figure 3 : thermal impedance figure 4 : output characteristics figure 5 : transfer characteristics figure 6 : gate charge vs gate - source voltage figure 7 : static drain - source on - resistance
STP10LN80K5 electric al characteristics docid027747 rev 2 7 / 14 figure 8 : capacitance variations figure 9 : normalized gate threshold voltage vs temperature figure 10 : normalized on - resistance vs temperature figure 11 : normalized v (br)dss vs temperature figure 12 : output capacitance stored energy figure 13 : source - drain diode forward characteristics
electrical characteristics STP10LN80K5 8 / 14 docid027747 rev 2 figure 14 : output capacitance stored ener gy
STP10LN80K5 test circuits docid027747 rev 2 9 / 14 3 test circuits figure 15 : test circuit for resistive load switching times figure 16 : test circuit for gate charge behavior figure 17 : test circuit for inductive load switching and diode recovery times figure 18 : unclamped inductive load test circuit figure 19 : unclamped inductive waveform figure 20 : switching time waveform
package information STP10LN80K5 10 / 14 docid027747 rev 2 4 package information in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark.
STP10LN80K5 package information docid027747 rev 2 11 / 14 4.1 to - 220 type a package in formation figure 21 : to - 220 type a package outline
package information STP10LN80K5 12 / 14 docid027747 rev 2 table 10: to - 220 type a mechanical data dim. mm min. typ. max. a 4.40 4.60 b 0.61 0.88 b1 1.14 1.70 c 0.48 0.70 d 15.25 15.75 d1 1.27 e 10 10.40 e 2.40 2.70 e1 4.95 5.15 f 1.23 1.32 h1 6.20 6.60 j1 2.40 2.72 l 13 14 l1 3.50 3.93 l20 16.40 l30 28.90 ?p 3.75 3.85 q 2.65 2.95
STP10LN80K5 revision history docid027747 rev 2 13 / 14 5 revision history table 11: document revision history date revision changes 10 - jun - 2015 1 first release. 14 - dec - 2015 2 datasheet promoted from preliminary data to production data modified: table 2: "absolute maximum ratings" , table 3: "thermal data" , table 4: "avalanche characteristics" , table 5: "on/off - state" , table 6: "dynamic" , figure 2: "safe operating area" , figure 3: "thermal impedance" , figure 4: "output charac teristics" and figure 7: "static drain - source on - resistance" minor text changes
STP10LN80K5 14 / 14 docid027747 rev 2 important notice C please read carefully stmicroelectronics nv and its subsidiaries (st) reserve the right to make changes, corrections, enhancements, modifications , and improvements to st products and/or to this document at any time without notice. purchasers should obtain the latest relevant information on st products before placing orders. st products are sold pursuant to sts terms and conditions of sale in place at the time of or der acknowledgement. purchasers are solely responsible for the choice, selection, and use of st products and s t assumes no liability for application assistance or the design of purchasers products. no license, express or implied, to any intellectual property right is granted by st herein. resale of st products with provisions different from the information se t forth herein shall void any warranty granted by st for such product. st and the st logo are trademarks of st. all other product or service names are the property of their respective owners. information in this document supersedes and replaces information previously supplied in any prior versions of this document. ? 2015 stmicroelectronics C all rights reserved

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